Cache performance evaluation[SimpleScalar] & dense matrix multiplication in blocking mode[C]
The main interest of this project was to analyse the performance impact of varying architectural parameters of a single core processor and verify its affect on the performance of a SPEC2000 benchmark program, equake using modes like out- of-order execution,in-order execution and sim-safe execution modes.
Results & Conclusion
Varying cache sizes to analyse and find an optimal L1 instruction cache and data cache size so that the cache miss rate and performance are optimal.
Analyse the performance of an NxN dense matrix multiplication with and without blocking, with and without compiler optimization on a real machine in C.
Study of relation between blocking factor, array size and cache size by varying array size and blocking factor. Blocking method achieved maximum compiler optimization
Contact
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